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Telechip TCC8900 poster

Telechip TCC8900 Full Processor Specifications

You are currently previewing Telechip TCC8900 processor specifications. View all our processor list for other models.

Generel Characteristics

Designer

Telechip

Type

TCC8900

Year Released

2010

Function

Multi-core Application Processor

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

ARMv6

Pipeline Stages

8 pipeline stages

Number of processor core(s)

1

Type of processor core(s)

ARM1176JZF-S

Buses

Memory Interface(s)

Yes

Number of data bus channels

1 ch

Non-volatile Memory Interface

NAND Flash Interface , SATA

Clock Frequencies

Recommended Minimum Clock Frequency

500 MHz min.

Recommended Maximum Clock Frequency

800 MHz max.

Cache Memories

L1 Instruction Cache per Core

16 Kbyte I-Cache

L1 Data Cache per Core

16 Kbyte D-Cache

Technology and Packaging

Semiconductor Technology

CMOS

Pins

400 pins

Supply Voltage

1.5 V

Graphical Subsystem

Embedded GPU

ARM Mali-200 GPU

Cellular Communication

Supported Cellular Data Links

No

Satellite Navigation

Supported GPS protocol(s)

No

Additional Information

Special Features

ARM946ES sub processor, 16 kbytes SRAM + 16 kbyte Boot ROM, VDS Transmitter, HDMI 1.3, Composite TV-Out (NTSC / PAL), USB 2.0 HS OTG, USB 1.1 HOST, EHI (External Host Interface), 6xUART, I2S Master & Slave Interface, SPDIF TX, UDMA IDE Interface, TS Interface, I2C 2 Channels, GPSB (General Purpose Serial Bus) 6 Channels, SDIO, TSC (Resistive Touch Screen Controller), 12-bit ADC 8 Channel, OpenGL ES 1.1 / 2.0, Open VG 1.1

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