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ARM 7TDMI-S Core Full Processor Specifications

You are currently previewing ARM 7TDMI-S Core processor specifications. View all our processor list for other models.

Generel Characteristics

Designer

ARM

Type

7TDMI-S Core

Year Released

1997

Function

Application Processor

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

ARMv4T

Number of processor core(s)

Type of processor core(s)

ARM7TDMI

Buses

Memory Interface(s)

Yes

Data Bus Width

32 bit

Number of data bus channels

1 ch

Non-volatile Memory Interface

Clock Frequencies

Recommended Maximum Clock Frequency

N/A

Cache Memories

L1 Instruction Cache per Core

8 Kbyte I-Cache

Technology and Packaging

Semiconductor Technology

CMOS

Graphical Subsystem

Embedded GPU

N/A

Cellular Communication

Supported Cellular Data Links

Satellite Navigation

Supported GPS protocol(s)

Additional Information

Special Features

8KB unified cache, 26/32-bit addressing, MMU, LCD controller, UART, Advanced Microcontroller Bus Architecture (AMBA)

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NEC VR5500

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