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ARM 7EJ-S Core poster

ARM 7EJ-S Core Full Processor Specifications

You are currently previewing ARM 7EJ-S Core processor specifications. View all our processor list for other models.

Generel Characteristics

Designer

ARM

Type

7EJ-S Core

Year Released

1999

Function

Application Processor

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

ARMv5TEJ

Number of processor core(s)

1

Type of processor core(s)

ARM7EJ-S

Buses

Memory Interface(s)

Yes

Data Bus Width

32 bit

Number of data bus channels

1 ch

Non-volatile Memory Interface

No

Clock Frequencies

Recommended Maximum Clock Frequency

N/A

Cache Memories

L1 Instruction Cache per Core

8 Kbyte I-Cache

Technology and Packaging

Semiconductor Technology

CMOS

Graphical Subsystem

Embedded GPU

N/A

Cellular Communication

Supported Cellular Data Links

No

Satellite Navigation

Supported GPS protocol(s)

No

Additional Information

Special Features

8KB unified cache, 26/32-bit addressing, MMU, LCD controller, UART, Advanced Microcontroller Bus Architecture (AMBA), DSP acceleration, Java byte-code execution unit (Jazelle technology)

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Devices Using ARM 7EJ-S Core

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