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Texas Instruments Sitara AM3703 Full Processor Specifications

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Generel Characteristics

Designer

Texas Instruments

Type

Sitara AM3703

Year Released

2010

Function

Application Processor

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

ARMv7

Pipeline Stages

13 pipeline stages

Number of processor core(s)

Type of processor core(s)

ARM Cortex-A8

Buses

Memory Interface(s)

mobile (LP) DDR SDRAM

Data Bus Width

32 bit

Number of data bus channels

1 ch

Non-volatile Memory Data Bus Width

16 bit

Non-volatile Memory Interface

Yes

DMA Channels

32 ch

Clock Frequencies

Recommended Minimum Clock Frequency

800 MHz min.

Recommended Maximum Clock Frequency

300 MHz max.

Cache Memories

L1 Instruction Cache per Core

32 Kbyte I-Cache

L1 Data Cache per Core

32 Kbyte D-Cache

Total L2 Cache

256 Kbyte L2

Technology and Packaging

Feature Size

45 nm

Semiconductor Technology

CMOS

Fab

Texas Instruments

Pins

515 pins

Graphical Subsystem

Embedded GPU

N/A

Cellular Communication

Supported Cellular Data Links

Satellite Navigation

Supported GPS protocol(s)

Additional Information

Special Features

NEON SIMD Coprocessor, 32-Ch System DMA controller, 16/32-bit LPDDR memory interface, 32Kbyte On-Chip ROM, 64Kbyte On-Chip SRAM, ARM TrustZone, Composite and S-video TV output, embedded image signal processor, SmartReflex Technology, DVFS, High Speed USB 2.0 On-The-Go support

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