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Telechip TCC7801 Full Processor Specifications

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Generel Characteristics

Designer

Telechip

Type

TCC7801

Year Released

2007

Function

Multi-core Application Processor

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

ARMv5TEJ

Number of processor core(s)

Type of processor core(s)

ARM926EJ-S

Buses

Memory Interface(s)

Yes

Data Bus Width

32 bit

Number of data bus channels

1 ch

Non-volatile Memory Interface

NAND Flash Interface

Clock Frequencies

Recommended Maximum Clock Frequency

N/A

Cache Memories

L1 Instruction Cache per Core

16 Kbyte I-Cache

L1 Data Cache per Core

16 Kbyte D-Cache

Technology and Packaging

Feature Size

130 nm

Semiconductor Technology

CMOS

Graphical Subsystem

Embedded GPU

N/A

Cellular Communication

Supported Cellular Data Links

Satellite Navigation

Supported GPS protocol(s)

Additional Information

Special Features

ARM946ES sub processor, 3x32 kbytes SRAM + 8 kbyte Boot ROM, 4+8 kbyte tightly coupled Memory

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Devices Using Telechip TCC7801

TELE System TS8800PND Specifications

Previous Processor

Acorn ARM3

Next Processor

Texas Instruments OMAP 733

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