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ST-Ericsson Nova A9500 Full Processor Specifications

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Generel Characteristics

Designer

ST-Ericsson

Type

Nova A9500

Year Released

2010

Function

Multi-core Application Processor

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

ARMv7

Pipeline Stages

8 pipeline stages

Number of processor core(s)

Type of processor core(s)

2x ARM Cortex-A9 MPcore

Buses

Memory Interface(s)

mobile (LP) DDR2 SDRAM

Number of data bus channels

1 ch

Non-volatile Memory Interface

Yes

Clock Frequencies

Recommended Minimum Clock Frequency

1000 MHz min.

Recommended Maximum Clock Frequency

1200 MHz max.

Technology and Packaging

Feature Size

45 nm

Semiconductor Technology

CMOS

Graphical Subsystem

Embedded GPU

ARM Mali-400 GPU

Number of GPU cores

1-core GPU

Dedicated Graphics Memory

0.25 MiB

Cellular Communication

Supported Cellular Data Links

Satellite Navigation

Supported GPS protocol(s)

Additional Information

Special Features

dual ARM Cortex-A9 Harvard Superscalar processor core, Multi-layer AHB/AXI bus, ARM TrustZone, ARM NEON SIMD engine, 1080p HDMI, WXGA LCD support, OpenGL ES 2.0, OpenVG 1.1

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