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Motorola i.MX1 MC9328MX1 Full Processor Specifications

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Generel Characteristics

Designer

Motorola

Type

i.MX1 MC9328MX1

Year Released

2003

Function

Application Processor

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

ARM v5TEJ

Number of processor core(s)

Type of processor core(s)

ARM920T

Buses

Memory Interface(s)

Yes

Data Bus Width

32 bit

Number of data bus channels

1 ch

Non-volatile Memory Interface

Clock Frequencies

Recommended Maximum Clock Frequency

N/A

Cache Memories

L1 Instruction Cache per Core

16 Kbyte I-Cache

L1 Data Cache per Core

16 Kbyte D-Cache

Technology and Packaging

Semiconductor Technology

CMOS

Pins

256 pins

Graphical Subsystem

Embedded GPU

N/A

Cellular Communication

Supported Cellular Data Links

Satellite Navigation

Supported GPS protocol(s)

Additional Information

Special Features

128KB shared SRAM, VMMU, MMC/SD host controller

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