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Marvell PXA988 Full Processor Specifications

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Generel Characteristics

Designer

Marvell

Type

PXA988

Year Released

2012

Function

Multi-core Application Processor with Modem

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

ARMv7

Pipeline Stages

8 pipeline stages

Number of processor core(s)

Type of processor core(s)

2x ARM Cortex-A9 MPcore

Buses

Memory Interface(s)

mobile (LP) DDR SDRAM , mobile (LP) DDR2 SDRAM

Max. Clock Frequency of Memory IF

533 MHz

Number of data bus channels

1 ch

Non-volatile Memory Interface

eMMC 4.5 , NAND Flash Interface

Clock Frequencies

Recommended Maximum Clock Frequency

1200 MHz max.

Technology and Packaging

Feature Size

45 nm

Semiconductor Technology

CMOS

Graphical Subsystem

Embedded GPU

N/A

Cellular Communication

Supported Cellular Data Links

CSD 9.6 kbps , GPRS (Class unspecified) , GPRS Class 12 , HSUPA (Cat. unspecified) , TD-HSDPA data links

Satellite Navigation

Supported GPS protocol(s)

Additional Information

Special Features

Marvell Sheeva technology, embedded GSM / GPRS Class 12 / TD-HSDPA 4.2Mbps / DLDC 8.4Mbps, TD-HSUPA 2.2Mbps Cat 6 baseband processor, GPU, ISP, 1080p24 video encode, 1080p30 video decode, 16 MP camera support, dual SIM, dual-standby support

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