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Marvell PXA986 Full Processor Specifications

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Generel Characteristics

Designer

Marvell

Type

PXA986

Year Released

2012

Function

Multi-core Application Processor with Modem

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

ARMv7

Pipeline Stages

8 pipeline stages

Number of processor core(s)

Type of processor core(s)

2x ARM Cortex-A9 MPcore

Buses

Memory Interface(s)

mobile (LP) DDR SDRAM , mobile (LP) DDR2 SDRAM

Max. Clock Frequency of Memory IF

533 MHz

Number of data bus channels

1 ch

Non-volatile Memory Interface

eMMC 4.5 , NAND Flash Interface

Clock Frequencies

Recommended Minimum Clock Frequency

312 MHz min.

Recommended Maximum Clock Frequency

1205 MHz max.

Technology and Packaging

Feature Size

45 nm

Semiconductor Technology

CMOS

Graphical Subsystem

Embedded GPU

Vivante GC1000 GPU

Cellular Communication

Supported Cellular Data Links

CSD 9.6 kbps , GPRS (Class unspecified) , GPRS Class 12 , UMTS 384 kbps (W-CDMA) , HSUPA (Cat. unspecified) , HSUPA 5.76 Mbps (Cat. 6) , HSDPA (Cat. unspecified) , HSPA+ 21.1 Mbps (Cat. 18) data links

Satellite Navigation

Supported GPS protocol(s)

Additional Information

Special Features

Marvell Sheeva technology, embedded GSM / GPRS Class 12 / UMTS / HSPA+ 21.1 Mbps UMTS Release 7 / HSUPA 5.76 Mbps baseband processor, Vivante GC1000 GPU, ISP, 1080p24 video encode, 1080p30 video decode, 16 MP camera support, dual SIM, dual-standby support

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