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Marvell PXA920 Full Processor Specifications

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Generel Characteristics

Designer

Marvell

Type

PXA920

Year Released

2009

Function

Application Processor with Modem

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

ARMv5

Number of processor core(s)

Type of processor core(s)

Marvell Sheeva

Buses

Memory Interface(s)

Yes

Data Bus Width

32 bit

Number of data bus channels

1 ch

Non-volatile Memory Interface

Yes

Clock Frequencies

Recommended Maximum Clock Frequency

1000 MHz max.

Technology and Packaging

Semiconductor Technology

CMOS

Graphical Subsystem

Embedded GPU

N/A

Cellular Communication

Supported Cellular Data Links

CSD 9.6 kbps , GPRS (Class unspecified) , HSUPA (Cat. unspecified) , TD-SCDMA , TD-HSDPA data links

Satellite Navigation

Supported GPS protocol(s)

Additional Information

Special Features

Embedded GSM/GPRS baseband processor (850/900/1800/1900MHz), embedded TD-SCDMA / TD-HSDPA / TD-HSUPA baseband processor (2000MHz)

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