Share This Processor

Marvell Armada 510 Full Processor Specifications

You are currently previewing Marvell Armada 510 processor specifications. View all our processor list for other models.

Generel Characteristics

Designer

Marvell

Type

Armada 510

Year Released

2010

Function

Application Processor

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

ARMv7, WMMX2

Number of processor core(s)

Type of processor core(s)

Marvell Sheeva

Buses

Memory Interface(s)

mobile (LP) DDR SDRAM , mobile (LP) DDR3 SDRAM

Data Bus Width

32 bit

Number of data bus channels

1 ch

Non-volatile Memory Data Bus Width

8 bit

Non-volatile Memory Interface

SATA

Clock Frequencies

Recommended Minimum Clock Frequency

1200 MHz min.

Recommended Maximum Clock Frequency

N/A

Cache Memories

L1 Instruction Cache per Core

32 Kbyte I-Cache

L1 Data Cache per Core

32 Kbyte D-Cache

Total L2 Cache

512 Kbyte L2

Technology and Packaging

Semiconductor Technology

CMOS

Graphical Subsystem

Embedded GPU

N/A

Cellular Communication

Supported Cellular Data Links

Satellite Navigation

Supported GPS protocol(s)

Additional Information

Special Features

Marvell Sheeva Superscalar processor core, integrated FPU v.3, 32-bit LP-DDR/DDR2/DDR3 SD RAM interface, NAND Flash support, integrated Marvell GC600 2D/3D graphics engine, 1080p H.264 30fps Decode, 1080p 30fps H.264 Encode, Up to 8 megapixel camera support, USB 2.0 host, USB 2.0 OTG, HDMI v1.3a TV out support, Wi-Fi, SATA, Ethernet, PCI Express, SDIO support

Disclaimer: DeviceBeast can not guarantee that the information on this page is 100% correct

Previous Processor

ARM 996HS

Next Processor

Texas Instruments OMAP 2420

Discussion

Start a new discussion for Marvell Armada 510 specifications. Please be fair to others, for the full rules do refer to the Discussion Rules page.