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MagicEyes MMSP 2+ Full Processor Specifications

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Generel Characteristics

Designer

MagicEyes

Type

MMSP 2+

Year Released

2005

Function

Application Processor

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

ARMv5

Number of processor core(s)

Type of processor core(s)

ARM926EJ-S

Buses

Memory Interface(s)

Yes

Data Bus Width

32 bit

Number of data bus channels

1 ch

Non-volatile Memory Interface

Yes

Clock Frequencies

Recommended Maximum Clock Frequency

N/A

Cache Memories

L1 Instruction Cache per Core

16 Kbyte I-Cache

L1 Data Cache per Core

16 Kbyte D-Cache

Technology and Packaging

Semiconductor Technology

CMOS

Graphical Subsystem

Embedded GPU

N/A

Cellular Communication

Supported Cellular Data Links

Satellite Navigation

Supported GPS protocol(s)

Additional Information

Special Features

ARM946E coprocessor, embedded 2D/3D graphics accelerator

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Toshiba TMPR3912U

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Texas Instruments OMAP V1035

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