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Ingenic Jz4730 Full Processor Specifications

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Generel Characteristics

Designer

Ingenic

Type

Jz4730

Year Released

2008

Function

Application Processor

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

MIPS32

Number of processor core(s)

Type of processor core(s)

MIPS XBurst

Buses

Memory Interface(s)

SDRAM

Number of data bus channels

1 ch

Non-volatile Memory Interface

NAND Flash Interface

Clock Frequencies

Recommended Maximum Clock Frequency

336 MHz max.

Cache Memories

L1 Instruction Cache per Core

16 Kbyte I-Cache

L1 Data Cache per Core

16 Kbyte D-Cache

Technology and Packaging

Feature Size

180 nm

Semiconductor Technology

CMOS

Graphical Subsystem

Embedded GPU

N/A

Cellular Communication

Supported Cellular Data Links

Satellite Navigation

Supported GPS protocol(s)

Additional Information

Special Features

AHB bus, 8 ch. DMC, Multimedia accelerator, LCD Controller, MMC/SD/SDIO controller, 4MP camera interface, smart card controller, 802.3 compliant Ethernet interface, PC card interface ( PCMCIA, CompactFlash)

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