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HiSilicon Honor KIRIN655 Hi6250 poster

Generel Characteristics

Designer

HiSilicon

Type

Honor KIRIN655 Hi6250

Year Released

2016

Function

Multi-core Application Processor with Modem

Architecture

Width of Machine Word

64 bit

Supported Instruction Set(s)

ARMv8-A (A32, A64)

Number of processor core(s)

8

Type of processor core(s)

8x ARM Cortex-A53 MPcore

Buses

Memory Interface(s)

mobile (LP) DDR3 SDRAM

Max. Clock Frequency of Memory IF

933 MHz

Data Bus Width

32 bit

Number of data bus channels

2 ch

Max. Data Rate

14.93 Gbyte/s

Non-volatile Memory Interface

eMMC 5.1

Clock Frequencies

Recommended Maximum Clock Frequency

2100 MHz max.

Technology and Packaging

Feature Size

16 nm

Semiconductor Technology

CMOS

Fab

TSMC

Graphical Subsystem

Embedded GPU

ARM Mali-T830 GPU

Number of GPU cores

2-core GPU

GPU Clock

900 MHz GPU

Cellular Communication

Supported Cellular Data Links

CSD 9.6 kbps , GPRS (Class unspecified) , GPRS Multi-slot Class 33 , EDGE (Class unspecified) , HSUPA (Cat. unspecified) , HSUPA 5.76 Mbps (Cat. 6) , HSDPA (Cat. unspecified) , HSPA+ 42.2 Mbps (Cat. 20) , DC-HSDPA 42.2 Mbps (Cat. 24) , cdmaOne (IS-95) , CDMA2000 1xRTT (IS-2000) , CDMA2000 1xEV-DO Rel. 0 , CDMA2000 1xEV-DO Revision A , TD-SCDMA , LTE (Cat. unspecified) , LTE 100 Mbps / 50 Mbps (Cat. 3) , LTE 150 Mbps / 50 Mbps (Cat. 4) , LTE 300 Mbps / 50 Mbps (Cat. 6) data links

Satellite Navigation

Supported GPS protocol(s)

Yes

Supported GLONASS protocol(s)

L1OF

Supported BeiDou system (BDS)

B1I BeiDou receiver

Additional Information

Special Features

quad ARM Cortex-A53 (up to 2.1 GHz) + quad ARM Cortex-A53 (up to 1.71 GHz) Harvard Superscalar processor cores, ARM big.LITTLE, HMP, GSM / GPRS Class 33 / EDGE / CDMA / W-CDMA / HSPA+ 42.2 Mbps / HSUPA 5.76 / TD-SCDMA / LTE-TDD / LTE-FDD Cat. 6 baseband modem, dual SIM support (DSDA, DSDS), Tensilica HiFi 4 DSP, 1080p video encode, 1080p video decode, OpenCL 1.2, Vulkan 1.0, DirectX 11

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Devices Using HiSilicon Honor KIRIN655 Hi6250

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