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DEC StrongARM SA-110 poster

DEC StrongARM SA-110 Full Processor Specifications

You are currently previewing DEC StrongARM SA-110 processor specifications. View all our processor list for other models.

Generel Characteristics

Designer

DEC

Type

StrongARM SA-110

Year Released

1996

Function

Application Processor

Architecture

Width of Machine Word

32 bit

Supported Instruction Set(s)

ARMv4

Number of processor core(s)

1

Type of processor core(s)

ARM SA-1

Buses

Memory Interface(s)

Yes

Data Bus Width

32 bit

Number of data bus channels

1 ch

Non-volatile Memory Interface

No

Clock Frequencies

Recommended Minimum Clock Frequency

100 MHz min.

Recommended Maximum Clock Frequency

233 MHz max.

Cache Memories

L1 Instruction Cache per Core

16 Kbyte I-Cache

L1 Data Cache per Core

16 Kbyte D-Cache

Technology and Packaging

Feature Size

350 nm

Semiconductor Technology

CMOS

Number of Transistors Integrated

2500000

Pins

144 pins

Supply Voltage

1.2 V

Graphical Subsystem

Embedded GPU

N/A

Cellular Communication

Supported Cellular Data Links

No

Satellite Navigation

Supported GPS protocol(s)

No

Additional Information

Special Features

MMU, Write buffer, Read buffer, LCD controller, serial I/O

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Devices Using DEC StrongARM SA-110

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