ARM Cortex-A8 Full Processor Specifications
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Generel Characteristics
ARM
Cortex-A8
2005
Application Processor
Architecture
32 bit
ARMv7-A
13 pipeline stages
1
ARM Cortex
Buses
Yes
32 bit
1 ch
No
Clock Frequencies
N/A
Cache Memories
32 Kbyte I-Cache
32 Kbyte D-Cache
1024 Kbyte L2
Technology and Packaging
65 nm
CMOS
Graphical Subsystem
N/A
Cellular Communication
No
Satellite Navigation
No
Additional Information
2000 million instruction per
1000 MHz
Superscalar processor, Configurable L1 and L2 cache sizes, FPU, MMU, AMBA 3.0 AXI bus, NEON Media Processing technology, ARM Thumb-2 Technology, ARM TrustZone Technology, ARM CoreSight, ARM Jazelle RCT
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